Sb0350 creative


CREATIVE SB0350 HARDWARE MANUAL Pdf Download.

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    Sound Blaster Series Hardware Programming Guide Hardware Overview Digital Sound Processor Mixer MIDI Port...

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    RESTRICTIONS ON USE Creative Technology Ltd. retains title and ownership of the manual and software as well as ownership of the copyright in any subsequent copies of the manual and software, irrespective of the form of media on or in which the manual and software are recorded or fixed.

  • Page 3: Limitation Of Liability

    Creative Technology Ltd. is aware of such errors and Creative Technology Ltd. shall be under no obligation to provide to Licensee any updates, corrections or bug-fixes which Creative Technology Ltd. may elect to prepare.

  • Page 4: Table Of Contents

    Contents Introduction What You Should Know....................ix Scope and Manual Organization...................ix Document Conventions....................x Determining User's Sound Blaster Card ..............xii Determining User's Card Settings................xiii Chapter 1 Hardware Overview Anatomy of Sound Blaster Family of Audio Cards............ 1-2 Digital Sound Processor Chip..............1-2 Mixer Chip....................

  • Page 5: Table Of Contents

    Contents Sample Procedures ....................3-10 General Procedures for a DMA mode Transfer.........3-11 Handling the DSP Digitized Sound I/O Interrupt ........3-11 8-bit Mono Single-cycle Transfer..............3-12 8-bit Mono Auto-initialize Transfer ............3-14 8-bit Mono High-Speed Single-cycle Transfer..........3-16 8-bit Mono High-Speed Auto-initialize Transfer........3-18 8-bit Stereo High-speed Single-cycle Transfer .........3-20 8-bit Stereo High-Speed Auto-initialize Transfer........3-22 8-bit or 16-bit Single-cycle Transfer............3-25 8-bit or 16-bit Auto-initialize Transfer............3-27...

  • Page 6: Table Of Contents

    SBPRO I/O Address Map ..................A-6 SBPRO MCV I/O Address Map................A-9 SB16 I/O Address Map..................A-10 Appendix B File Format Creative Voice File (VOC) Format................B-2 Header Block....................B-2 Data Block ....................B-3 Creative ADPCM Wave Type Format..............B-12 Appendix C Relevant Information...

  • Page 7: Table Of Contents

    List of Figures and Tables Figures Figure 1-1 Block Diagram of the Advanced Signal Processor........1-4 Figure 1-2 Block Diagram of the Sound Blaster 2.0............1-6 Figure 1-3 Block Diagram of the Sound Blaster 2.0 CD Interface ........1-7 Figure 1-4 Block Diagram of the Sound Blaster Pro.............1-8 Figure 1-5 Block Diagram of the Sound Blaster 16 Advanced Signal Processing ..1-9 Figure 3-1...

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    16 (SB16) Sound Blaster 16 with Advanced Signal Processing This manual documents the programming interface to the main Creative-specific Sound Blaster hardware components; namely the Digital Sound Processor (DSP), Mixer chip, and MIDI Port. The Digital Sound Processor handles digitized sound recording and playback. It supports 8- or 16-bit digitized sound.

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    Some chapters in this manual assume additional knowledge on your part. The introductions to these chapters will list these assumptions. Scope and Manual Organization This manual focuses on the Creative-specific hardware programming of the following: Digital Sound Processor Mixer Chip MIDI Port Refer to Appendix B, "Relevant Information"...

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    Introduction Chapter 3, "Digitized Sound I/O Programming", describes the programming information for digitized sound I/O. This covers 8-bit and 16-bit, mono and stereo, high-speed and auto-initialize DMA programming. Chapter 4, "Mixer Chip Programming", discusses the essentials for control of the mixer chip.

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    Introduction To help you to locate and identify information easily, this manual uses visual cues and standard text formats. The following typographic conventions are used throughout this manual: Example Description Bold letters are used for keywords or to emphasize certain Write-Buffer words.

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    Introduction The following DSP version notations will be used in the discussions: Version Notation Description 1.xx This means DSPs with major version number 1. 2.00 This means only the DSPs with version number 2.00. 2.01+ This means DSPs with major version number 2, version 2.00 is excluded.

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    Introduction xiii Determining User's Card Settings Most of the Sound Blaster card settings are jumper selectable to avoid conflicts with other peripheral cards. To aid the application in determining the settings used by a Sound Blaster card, we have advocated the use of an environment variable called BLASTER. The user will set up this environment variable during card installation.

  • Page 14: Hardware Overview

    Chapter 1 Hardware Overview This chapter gives an overview of the hardware architecture of the Sound Blaster family of audio cards. It is meant for developers who intend to do hardware level programming. Major building blocks of the Sound Blaster family cards and their functionalities will be discussed.

  • Page 15: Anatomy Of Sound Blaster Family Of Audio Cards, Digital Sound Processor Chip

    Hardware Overview Anatomy of Sound Blaster Family of Audio Cards This section describes the major building blocks of the Sound Blaster family of audio cards. The functionalities and features of the following components will be presented: Digital Sound Processor (DSP) chip Mixer chip FM Synthesizer chip Bus Interface chip...

  • Page 16: Mixer Chip, Fm Synthesizer Chip

    Hardware Overview Different DSP versions are used on various versions of Sound Blaster family cards. Over the years, the functionality of the DSP has been greatly enhanced. The later versions of DSP are designed to be downward compatible with its earlier counterparts with new features introduced.

  • Page 17: Bus Interface Chip, Advanced Signal Processor, Figure 1-1 Block Diagram Of The Advanced Signal Processor

    Hardware Overview Bus Interface Chip The Bus Interface Chip (CT1336) is responsible for providing handshake signals and data transfer between the ISA bus and various components on the Sound Blaster card. On Sound Blaster 16, it provides MPU-401 UART mode compatible MIDI, FIFOs for digital audio playback and recording, and interrupt channel sharing by three different processes (8-bit digitized sound, 16-bit digitized sound and MIDI).

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    The control of the Advanced Signal Processor, including downloading, is handled by a device-level driver called CSP.SYS. You can access this device driver via the Creative Multimedia System (CTMMSYS) driver. Refer to the chapters "Creative Multimedia System Driver" in the Programmer's Guide and Library Reference...

  • Page 19: Block Diagrams For Sound Blaster Family Of Audio Cards

    Hardware Overview Block Diagrams for Sound Blaster Family of Audio Cards After presenting the introduction to the major building blocks of Sound Blaster cards, we will now present the block diagrams for SB2.0, SB2CD, SBPRO and SB16. J O Y S T I C K M I D I P O R T P O R T...

  • Page 20: Figure 1-3 Block Diagram Of The Sound Blaster 2.0 Cd Interface

    Hardware Overview CD IN VOICE IN CT1335 MUSIC IN B U S Mixer Chip Power S P K R A m p . TO CD-ROM Drive Interface B U S Figure 1-3: Block Diagram of the Sound Blaster 2.0 CD Interface The SB2CD is the CD-ROM upgrade for SB2.0.

  • Page 21: Figure 1-4 Block Diagram Of The Sound Blaster Pro

    Hardware Overview JOYSTICK MIDI FILTER PORT PORT COMMAND/ VOICE DATA D A T A A G C MIC IN CT1341 CONTROL CT1345 CONTROL CT1336 MIXER CD IN CHIP CONTROL INTERFACE CHIP LINE IN SYNTHESIZER POWER SPKR CD-ROM DRIVE INTERFACE Figure 1-4: Block Diagram of the Sound Blaster Pro Sound Blaster Pro is a 8-bit stereo sampling card with stereo mixer chip and CD-ROM interface built in.

  • Page 22: Figure 1-5 Block Diagram Of The Sound Blaster 16 Advanced Signal Processing

    Hardware Overview MIDI PORT JOYSTICK SB and MPU-401 PORT COMPATIBLE COMMAND/ MIC IN DATA CT1741 (Mono) CD IN CT1745 (Stereo) CT1746 MIXER CHIP LINE IN INTERFACE 16-bit CT1748 (Stereo) CHIP AD/DA PC-SPKR CONTROL (Mono) LINE-OUT (Stereo) SYNTEHSIZER POWER WAVE SPKR BLASTER INTERFACE CR-ROM DRIVE...

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    Chapter 2 Introduction to DSP Programming This chapter discusses the essentials for programming the Creative Digital Sound Processor (DSP). The DSP chip handles digitized sound I/O and MIDI operations. You must read this chapter carefully to ensure you understand the characteristics of the DSP before you proceed to program digitized sound or MIDI operations.

  • Page 24: Dsp I/o Addresses, Resetting Dsp, Table 2-1 Dsp I/o Ports

    Introduction to DSP Programming DSP I/O Addresses The DSP is programmed through four selectable I/O addresses on the Sound Blaster cards. The following lists the I/O addresses and their functionalities. x represents the jumper selectable base I/O addresses. Reset 2x6h Used to reset the DSP to its default state.

  • Page 25: Reading From Dsp

    Introduction to DSP Programming Sound Blaster card may not be installed or an incorrect I/O address is being used. You should exit the reset process and declare an error. The following assembly code fragment shows the process of resetting the DSP: dx,wSBCBaseAddx ;...

  • Page 26: Writing To Dsp, Handling Interrupts From Dsp

    Introduction to DSP Programming Writing to DSP DSP commands and data are sent through the Write Command/Data port. Before data is written to the DSP, bit-7 of the Write-Buffer Status port must be checked to ensure that the DSP command/data buffer is empty. If bit-7 is 0, the DSP buffer is empty and is ready to receive commands or data.

  • Page 27: Sharing Of Interrupts

    Introduction to DSP Programming Sharing of Interrupts With DSP version 4.xx, four interrupts use the same Interrupt Request (IRQ) line. These are the 8-bit and 16-bit DMA mode digitized sound I/O, Sound Blaster MIDI (SB-MIDI), and MPU-401 MIDI UART mode interrupts. The Interrupt Status register, addressed as register 82h on the Mixer register map, is used by the ISR to determine whether the interrupt is meant for it or for some other ISR, in which case it should chain to the previous routine.

  • Page 28: Configuring Dma And Interrupt Settings

    Introduction to DSP Programming The following assembly code fragment illustrates the interrupt handling portion within a 16-bit DMA mode digitized sound I/O ISR: dx,wSB16BaseAddx ; SB16 base I/O address 2 x 0h dl,4 ; Mixer register address port 2 x 4h al,82h ;...

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    Introduction to DSP Programming The byte from register 81h is interpreted as follows:...

  • Page 30: Digitized Sound Operation Modes

    Chapter 3 Digitized Sound I/O Programming This chapter discusses the techniques of programming the DSP for digitized sound I/O and introduces the operational methods and modes available. It assumes that you have some working knowledge on programming the DMA controller and the Programmable Interrupt Controller.

  • Page 31: Digitized Sound Data Format, Digitized Sound I/o Transfer Rate

    Digitized Sound I/O Programming Digitized Sound Operation Modes This section describes the digitized sound data format and various digitized sound operation modes available on the DSP. It covers the following topics: digitized sound data format digitized sound I/O transfer rate direct mode digitized sound I/O single-cycle DMA mode digitized sound I/O auto-initialize DMA mode digitized sound I/O...

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    Digitized Sound I/O Programming The order of the data varies between 8-bit and 16-bit data, and mono and stereo formats. The following show the data order for the first four bytes of different PCM data formats: sample 1 sample 2 sample 3 sample 4 Channel 0...

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    Digitized Sound I/O Programming Digitized Sound I/O Transfer Rate Other than direct mode, all the digitized sound I/O operation modes require the transfer rate to be set before any transfer is carried out. To set the transfer rate, you may either program the DSP with the respective transfer rate Time Constant (supported by all DSP versions), or program the DSP with the actual sampling rate (only available on DSP version 4.xx).

  • Page 34: Single-cycle Dma Mode

    Digitized Sound I/O Programming Single-cycle DMA Mode In single-cycle DMA mode digitized sound I/O transfer, the DSP is programmed to make one transfer only. The DSP will generate an interrupt to signal the application at the end of the transfer. Due to DMA constraints, the digitized sound data transfer cannot straddle a 64 KB physical page boundary.

  • Page 35: Auto-initialize Dma Mode, High-speed Dma Mode

    Digitized Sound I/O Programming There are two ways to terminate auto-initialize DMA mode transfer: Program the DSP to switch to single-cycle DMA mode transfer. At the end of the current block transfer, the DSP will exit from auto-initialize DMA mode and continue to transfer using the specified single-cycle DMA mode.

  • Page 36: Adpcm Dma Mode

    Digitized Sound I/O Programming ADPCM DMA mode The compression technique used by the DSP is known as ADPCM (Adaptive Delta Pulse Code Modulation). This technique stores the difference between data values instead of the actual data. The DSP supports decompression in the output process only.

  • Page 37: Dsp Digitized Sound I/o Capability, Table 3-1 Dma Operation Modes Supported

    Digitized Sound I/O Programming DSP Digitized Sound I/O Capability Because the DSP is periodically enhanced, the capabilities of the DSP particularly with regard to the sampling rates and DMA operation modes, have varied among the different versions. The table below lists the DMA operation modes supported by different versions of the DSP: DSP Version DMA Operation Mode...

  • Page 38: Table 3-2 Digitized Sound Output Capabilities

    Digitized Sound I/O Programming The tables below list the sampling ranges for the supported DMA modes among the various DSP versions. Normal on the "Transfer Mode" column refers to non high- speed DMA mode. You must take note of the information below when programming for the different versions of the DSP.

  • Page 39: Table 3-3 Digitized Sound Input Capabilities

    3-10 Digitized Sound I/O Programming Digitized Sound Input Capability DSP Version Transfer Mode Data Format Sampling Range 4.xx Mono/Normal 8-bit unsigned 5000 to 44100 Hz Mono/Normal 16-bit signed 5000 to 44100 Hz Stereo/Normal 8-bit unsigned 5000 to 44100 Hz Stereo/Normal 16-bit signed 5000 to 44100 Hz 3.xx...

  • Page 40: Sample Procedures

    Digitized Sound I/O Programming 3-11 Sample Procedures This section provides step by step procedures needed to perform the various DMA modes of digitized sound operations described in the first section. It covers the following sample procedures: General procedures for a DMA mode transfer Handling the DSP digitized sound I/O interrupt 8-bit mono PCM or ADPCM single-cycle DMA mode transfer 8-bit mono PCM or ADPCM auto-initialize DMA mode transfer...

  • Page 41: General Procedures For A Dma Mode Transfer, Handling The Dsp Digitized Sound I/o Interrupt

    3-12 Digitized Sound I/O Programming General Procedures for a DMA mode Transfer The general steps for programming the DSP for digitized sound data transfer in DMA mode is as follows: Set up the interrupt service routine. Program the DMA controller. Program the DSP sampling rate.

  • Page 42: Bit Mono Single-cycle Transfer

    Digitized Sound I/O Programming 3-13 8-bit Mono Single-cycle Transfer The following are the steps needed to perform 8-bit mono PCM and ADPCM single- cycle DMA mode transfer: Set up the DSP interrupt service routine. Enable the interrupt used. Turn on the DAC speaker for digitized output. Otherwise, turn it off. to turn off the DAC speaker outp(wSBCBaseAddx+0xC, 0xD3) to turn on the DAC speaker...

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    3-14 Digitized Sound I/O Programming When the DSP sends an interrupt, the following steps should be done in the interrupt service routine: Program the DMA controller for the next block. Program the DSP for the next block. outp(wSBCBaseAddx+0xC, bCommand) outp(wSBCBaseAddx+0xC, wLength.LowByte) outp(wSBCBaseAddx+0xC, wLength.HighByte) bCommand is one of the following: bCommand...

  • Page 44: Bit Mono Auto-initialize Transfer

    Digitized Sound I/O Programming 3-15 8-bit Mono Auto-initialize Transfer The following are the steps needed to perform 8-bit mono PCM and ADPCM auto-initialize DMA mode transfer: Allocate a DMA buffer in contiguous memory without straddling a 64KB physical page boundary. Use an 8KB buffer as an example. Set up the DSP interrupt service routine.

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    3-16 Digitized Sound I/O Programming When the DSP sends an interrupt, the following steps should be done in the interrupt service routine: Transfer data between the DMA buffer and the storage buffer. To stop auto-initialize DMA mode, you can either send the exit auto-initialize DMA mode command or program the DSP for single-cycle DMA mode transfer.

  • Page 46: Bit Mono High-speed Single-cycle Transfer

    Digitized Sound I/O Programming 3-17 8-bit Mono High-Speed Single-cycle Transfer The following are the steps needed to perform 8-bit mono PCM high-speed single- cycle DMA mode transfer: Set up the DSP interrupt service routine. Enable the interrupt used. Turn on the DAC speaker for digitized output. Otherwise, turn it off. to turn off the DAC speaker outp(wSBCBaseAddx+0xC, 0xD3) to turn on the DAC speaker...

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    3-18 Digitized Sound I/O Programming At the end of data transfer: Turn off the DAC speaker. outp(wSBCBaseAddx+0xC, 0xD3) Disable the interrupt used. Restore the original interrupt service routine. During high-speed DMA mode data I/O, the DSP will not accept any commands. Hence, to stop data transfer before the end of a block, send the reset DSP command.

  • Page 48: Bit Mono High-speed Auto-initialize Transfer

    Digitized Sound I/O Programming 3-19 8-bit Mono High-Speed Auto-initialize Transfer The following are the steps needed to perform 8-bit mono PCM high-speed auto- initialize DMA mode transfer: Allocate a DMA buffer in contiguous memory without straddling a 64KB physical page boundary. Use an 8KB buffer as an example. Set up the DSP interrupt service routine.

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    3-20 Digitized Sound I/O Programming To stop high-speed auto-initialize DMA mode, send the reset DSP command. At the end of data transfer: Turn off the DAC speaker. outp(wSBCBaseAddx+0xC, 0xD3) Disable the interrupt used. Restore the original interrupt service routine. Release the allocated DMA buffer.

  • Page 50: Bit Stereo High-speed Single-cycle Transfer

    Digitized Sound I/O Programming 3-21 8-bit Stereo High-speed Single-cycle Transfer The following are the steps needed to perform 8-bit stereo PCM high-speed single- cycle DMA mode transfer: Set up the DSP interrupt service routine. Enable the interrupt used. Turn on the DAC speaker for digitized output. Otherwise, turn it off. to turn off the DAC speaker outp(wSBCBaseAddx+0xC, 0xD3) to turn on the DAC speaker...

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    3-22 Digitized Sound I/O Programming Set the DSP block transfer size. outp(wSBCBaseAddx+0xC, 0x48) outp(wSBCBaseAddx+0xC, wBlkSize.LowByte) outp(wSBCBaseAddx+0xC, wBlkSize.HighByte) wBlkSize is one less than the actual transfer size. Send an I/O command to start high-speed single-cycle DMA mode transfer. outp(wSBCBaseAddx+0xC, bCommand) bCommand is one of the following: bCommand Description 8-bit PCM high-speed input...

  • Page 52: Bit Stereo High-speed Auto-initialize Transfer

    Digitized Sound I/O Programming 3-23 8-bit Stereo High-Speed Auto-initialize Transfer The following are the steps needed to perform 8-bit stereo PCM high-speed auto- initialize DMA mode transfer: Allocate a DMA buffer in contiguous memory without straddling a 64KB physical page boundary. Use an 8KB buffer as an example. Set up the DSP interrupt service routine.

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    3-24 Digitized Sound I/O Programming Set the DSP block transfer size. outp(wSBCBaseAddx+0xC, 0x48) outp(wSBCBaseAddx+0xC, wBlkSize.LowByte) outp(wSBCBaseAddx+0xC, wBlkSize.HighByte) wBlkSize is one less than the actual transfer size. 10. Send an I/O command to start high-speed auto-initialize DMA mode transfer. outp(wSBCBaseAddx+0xC, bCommand) bCommand is one of the following: bCommand Description...

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    Digitized Sound I/O Programming 3-25 Turn off the DAC speaker. outp(wSBCBaseAddx+0xC, 0xD3) Disable the interrupt used. Restore the original interrupt service routine. Release the allocated DMA buffer. During high-speed DMA mode data I/O, the DSP will not accept any further commands.

  • Page 55: Bit Or 16-bit Single-cycle Transfer

    3-26 Digitized Sound I/O Programming 8-bit or 16-bit Single-cycle Transfer The following are the steps needed to perform 8-bit or 16-bit and mono or stereo PCM single-cycle DMA mode transfer on DSP version 4.xx: Set up the DSP interrupt service routine. Enable the interrupt used.

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    Digitized Sound I/O Programming 3-27 bMode is one of the following: bMode Description 8-bit mono unsigned PCM 8-bit stereo unsigned PCM 16-bit mono signed PCM 16-bit stereo signed PCM wLength is one less than the actual number of samples to be transferred. The transfer begins here.

  • Page 57: Bit Or 16-bit Auto-initialize Transfer

    3-28 Digitized Sound I/O Programming 8-bit or 16-bit Auto-initialize Transfer The following are the steps needed to perform 8-bit or 16-bit and mono or stereo PCM auto-initialize DMA mode transfer on DSP version 4.xx: Allocate a DMA buffer in contiguous memory without straddling a 64KB physical page boundary.

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    Digitized Sound I/O Programming 3-29 bMode is one of the following: bMode Description 8-bit mono unsigned PCM 8-bit stereo unsigned PCM 16-bit mono signed PCM 16-bit stereo signed PCM wBlkSize is one less than the actual number of samples to be transferred. If an 8KB DMA buffer is used, the DSP block transfer size should be set to 4K of 8-bit samples for 8-bit data transfer, or 2K of 16-bit samples for 16- bit data transfer.

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    Chapter 4 Mixer Chip Programming Three different mixer chips are used on Sound Blaster cards: CT1335, CT1345 and CT1745. CT1335 is used on the Sound Blaster 2.0 CD Interface card, CT1345 is used on the Sound Blaster Pro and CT1745 is used on the Sound Blaster 16. This chapter discusses the essentials for programming the mixer chips.

  • Page 60: Programming Sequence

    Mixer Chip Programming Programming Sequence Each mixer chip uses two consecutive I/O ports: 2x4h and 2x5h where x depends on the jumper selectable setting of the base I/O address. Port 2x4h is the write-only Address Port. Port 2x5h is the Data Port which can be read or written. The sequence for programming a mixer chip is as follows: write the index of the mixer register to the Address Port.

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    Mixer Chip Programming Certain bits in a mixer register may be reserved, in which case their values are undefined. When these bits are accessed, you must treat them as fully undefined. This is essential for software compatibility with future mixer chips. Follow the guidelines below: Do not depend on the values of any undefined bits when testing the value of defined register bits.

  • Page 62: Ct1335 Mixer, Features, Register Functions, Figure 4-1 Register Map Of Ct1335 Mixer

    Mixer Chip Programming CT1335 Mixer This section describes the features and register functions of the CT1335 mixer chip used on the Sound Blaster 2.0 CD Interface card. Features CT1335 is a mono mixer chip that only controls the output mixing. It has the following features: Volume Control CT1335 provides independent 8-level volume control for the Master, MIDI and CD...

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    Mixer Chip Programming The function of each register is discussed below: Register 0x00 (Reset Mixer) Write any 8-bit value to this register to reset the mixer chip. After a reset, all the registers will be restored to their default values. Register 0x02 (Master volume) Register 0x06 (MIDI volume) 3 bits, giving 8 levels.

  • Page 64: Ct1345 Mixer, Features

    Mixer Chip Programming CT1345 Mixer This section describes the features and register functions of the CT1345 mixer chip used on the Sound Blaster Pro card. Features CT1345 is a stereo mixer that controls volume, output mixing, and input source selection as well as the input and output low-pass filters. It also controls the stereo voice data output.

  • Page 65: Register Functions, Figure 4-2 Register Map Of Ct1345 Mixer

    Mixer Chip Programming Stereo Digitized Sound Output Switch There is a switch on CT1345 to toggle digitized sound output data between the left and right DAC channels. The first digitized sound data byte will be directed to the left channel. It must be switched "On"...

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    Mixer Chip Programming Register 0x0A (Mic mixing volume) 2 bits, giving 4 levels. 0 to 3 – 46 dB to 0 dB, in approximate 7 dB steps. Default is 0 – 46 dB. Register 0x0C:1,2 (Input Source) Set these two bits to one of the following values to select the input source. 0 or 2 Microphone source.

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    Mixer Chip Programming Register 0x0E:1 (Stereo Switch) Digitized sound data stereo output switch. This must be switched back to default as soon as stereo output is done. mono output. stereo output. Default is 0 mono output. Register 0x0E:5 (Output Filter) Output filter off switch.

  • Page 68: Ct1745 Mixer, Features

    4-10 Mixer Chip Programming CT1745 Mixer This section describes the features and register functions of the CT1745 mixer chip used on the Sound Blaster 16. Features The features of CT1745 have been greatly enhanced from CT1345 Mixer. Volume Control CT1745 provides independent 32-level volume control of both stereo channels for the Master, Voice, MIDI, CD and Line-In sources.

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    Mixer Chip Programming 4-11 Microphone Automatic Gain Control (AGC) Helps to maintain the mic input signal at a reasonable level. Gain Control Independent 4-level gain control on each of the left/right input/output mixing paths. Tone Control Independent 16-level bass and treble control on the left and right output mixing paths.

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    4-12 Mixer Chip Programming Index 0x00 Reset Mixer 0x04 Voice volume.L Voice volume.R 0x0A Mic volume 0x22 Master volume. L Master volume.R 0x26 MIDI volume.L MIDI volume.R 0x28 CD volume.L CD volume.R 0x2E Line volume.L Line volume.R 0x30 Master volume.L 0x31 Master volume.R 0x32...

  • Page 71: Figure 4-4 Logical Schematic Of The Output Mixing Paths

    Mixer Chip Programming 4-13 Figure 4-4: Logical Schematic of the Output Mixing Paths...

  • Page 72: Figure 4-5 Logical Schematic Of The Input Mixing Paths

    4-14 Mixer Chip Programming Figure 4-5: Logical Schematic of the Input Mixing Paths...

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    Mixer Chip Programming 4-15 The function of each register is discussed below: Register 0x00 (Reset Mixer) Write any 8-bit value to this register to reset the mixer. After a reset, all the registers will be restored to their default values. Registers 0x04, 0x0A, 0x22, 0x26, 0x28, 0x2E (CT1345 mixer chip compatibility volume controls) These registers help maintain some compatibility with the CT1345 mixer...

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    4-16 Mixer Chip Programming Registers 0x38/0x39 (Line volume .L/.R) Register 0x3A (Mic volume) 5 bits per channel, giving 32 levels. 0 to 31 – 62 dB to 0 dB, in 2 dB steps. Default is 0 – 62 dB. Register 0x3B (PC Speaker volume) 2 bits, giving 4 levels.

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    Mixer Chip Programming 4-17 Registers 0x3F/0x40 (Input Gain .L/.R) Registers 0x41/0x42 (Output Gain .L/.R) 2 bits per channel, giving 4 levels. 0 to 3 0 dB to 18 dB, in 6 dB steps. Default is 0 0 dB. Register 0x43:0 (Mic AGC) AGC on (default).

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    Chapter 5 MIDI Port I/O Programming This chapter discusses Sound Blaster MIDI (SB-MIDI) and MPU-401 UART mode programming. SB-MIDI port is available on all the Sound Blaster cards. MPU-401 UART mode is available on the Sound Blaster 16 only. You can use either of the MIDI interfaces. However, it is better to use the MPU-401 mode on Sound Blaster 16 because it has its own independent I/O ports and interrupt status bit which means that it is possible to have digitized sound and MIDI I/O running together.

  • Page 77: Sb-midi Mode, I/o Addresses

    MIDI Port I/O Programming SB-MIDI Mode SB-MIDI mode provides an interface for MIDI I/O in Normal mode as well as UART mode. UART mode requires a DSP with a minimum version of 2.00. Under Normal mode, all MIDI out data must be preceded by a MIDI output command, but under UART mode, a write to the DSP is taken as MIDI data.

  • Page 78: Sending Midi Data

    MIDI Port I/O Programming Sending MIDI Data The following contrasts the difference between sending MIDI data in Normal mode and UART mode: Normal Mode Under MIDI Normal mode, all the MIDI out data must be preceded by a MIDI output command.

  • Page 79: Reading Midi Data

    MIDI Port I/O Programming Reading MIDI Data When MIDI data is available from an external MIDI device, it can be read in from the DSP data port. As mentioned before, there are two operational modes for detecting the availability of in-bound MIDI data: polling mode or interrupt mode. When in polling mode, in-bound MIDI data is available when bit 7 of the DSP Read-Buffer Status port is set.

  • Page 80: Mpu-401 Uart Mode, I/o Addresses

    MIDI Port I/O Programming MPU-401 UART Mode Only the MPU-401 UART (or pass-through) mode is supported on Sound Blaster 16. In this mode, the interface performs no services, literally relaying everything it receives, without modification or interpretation, between the PC and the attached MIDI device. Once UART mode is entered, the only command the interface recognizes is Reset.

  • Page 81: Checking The Status

    MIDI Port I/O Programming Checking the Status Before writing a command byte or MIDI data to (or reading a data byte or MIDI data from) the MPU-401 interface, the status port must be checked to see whether the interface is ready. Bit 6, the Output Ready bit, indicates whether the interface is ready to receive data.

  • Page 82: Sending A Command

    MIDI Port I/O Programming Sending a Command Commands are sent through the Command port to control the operation of the interface. Before sending the command, the Status port must be polled. Example code: dx,wMpuBaseAddx ;MPU-401 base I/O address ;Status port Busy: al,dx ;Read status port...

  • Page 83

    MIDI Port I/O Programming Reset The command byte 0FFh is used to reset the MPU-401 interface. After resetting the interface, a Command Acknowledge byte, 0FEh, should be read back from the Data port. This mechanism can also be used to detect the existence of the MPU-401 interface. After an interface reset, the data read in from the Data port should be verified to be 0FEh.

  • Page 84

    MIDI Port I/O Programming Enter UART Mode In order to send or receive MIDI data, the command byte 3Fh must first be sent out to switch the interface into UART mode. A Command Acknowledge byte of 0FEh will be made available on the Data port if the mode switch is successful. In UART mode, MIDI data is sent to and received from the Data port.

  • Page 85

    5-10 MIDI Port I/O Programming Sending MIDI Data Once in UART mode, MIDI data can be sent to an external MIDI device by writing to the Data port. Example code: dx,wMpuBaseAddx ;MPU-401 base I/O address ;Status port Busy: al,dx ;Read status port test al,40h ;Ready for output?

  • Page 86

    Chapter 6 DSP Commands This chapter documents the commands for the Creative Digital Sound Processor (DSP). Many enhancements have been made to the DSP from version to version. For instance, MIDI UART mode and DMA auto-initialize mode were introduced with DSP version 2.00;...

  • Page 87: Commands By Category

    DSP Commands Commands by Category The table below categorize the commands according to their functionalities. The commands below are available for DSP versions 1.xx, 2.00, 2.01+, 3.xx and 4.xx. Category Cmd# Description 8-bit direct mode digitized sound Output Input Transfer time constant Set digitized sound transfer time constant 8-bit single-cycle DMA mode Output...

  • Page 88

    DSP Commands The commands below are available on DSP versions 2.00, 2.01+, 3.xx and 4.xx. Category Cmd# Description 8-bit auto-init DMA mode Output digitized sound I/O Input 8-bit to 4-bit ADPCM output with ref. byte 8-bit to 3-bit ADPCM output with ref. byte 8-bit to 2-bit ADPCM output with ref.

  • Page 89

    DSP Commands The commands below are only available on DSP version 3.xx. Category Cmd# Description Stereo control Set input mode to mono Set input mode to stereo The commands below are only available on DSP version 4.xx. Category Cmd# Description Digitized sound I/O Set output sampling rate sampling rate...

  • Page 90: Command Descriptions

    DSP Commands Command Descriptions The DSP command descriptions will be presented in the following format: Command purpose of the command Output The command byte follows by parameter(s) to output in byte. Remarks Detailed description of the command and its usage. See Also Related commands (if any).

  • Page 91

    DSP Commands The following discusses the DSP commands in ascending order: 8-bit direct mode single byte digitized sound output Output 10h, bData Remarks Output one byte unsigned digitized sound data to the DSP. The application is responsible for controlling the sampling rate. The proper transfer sequence is: Send command 10h.

  • Page 92

    Output 17h, wLength.LowByte, wLength.HighByte Remarks Output first block of digitized sound data compressed with Creative 8-bit to 2-bit ADPCM using single-cycle DMA mode. wLength is a word giving the number of bytes to transfer less 1. Subsequent blocks are transferred with the no reference byte command.

  • Page 93

    DSP Commands 8-bit auto-init DMA mode digitized sound output Output Remarks Output unsigned digitized sound data using auto-init DMA mode. The DSP will generate an interrupt to signal the application after transferring every Block of data of size set by command 48h. There are 2 ways to terminate auto-init DMA mode I/O: Program single-cycle DMA mode digitized sound I/O.

  • Page 94

    Output Remarks Output digitized sound data compressed with Creative 8-bit to 2-bit ADPCM using auto-init DMA mode. Refer to command 1Ch on how to terminate an auto-init transfer. If the transfer is terminated by programming the last block to single-cycle DMA mode digitized sound I/O, the last block must be programmed with the no reference byte command, 16h.

  • Page 95

    6-10 DSP Commands 8-bit single-cycle DMA mode digitized sound input Output 24h, wLength.LowByte, wLength.HighByte Remarks Input unsigned digitized sound data using single-cycle DMA mode. wLength is a word giving the number of 8-bit samples less 1. See Also command 14h, 8-bit single-cycle DMA mode digitized sound output Available 1.xx 2.00...

  • Page 96

    DSP Commands 6-11 Polling mode MIDI input Output Remarks Input MIDI data from the MIDI port using polling mode. The proper sequence is: Send command 30h. Poll DSP for MIDI data. See Also command 31h, Interrupt mode MIDI input command 34h, UART polling mode MIDI I/O 1.xx 2.00 2.01+...

  • Page 97

    6-12 DSP Commands UART polling mode MIDI I/O Output Remarks For MIDI UART mode, a read from the DSP is taken as reading MIDI data and a write to the DSP is taken as sending MIDI data. To terminate MIDI UART mode, send a DSP reset command. The DSP reset command behaves differently while the DSP is in MIDI UART mode.

  • Page 98

    DSP Commands 6-13 UART polling mode MIDI I/O with time stamping Output Remarks For time stamping mode, in-bound MIDI data is tagged with a time stamp by the DSP. The time stamp is a 3-byte quantity in units of milliseconds. The order of time stamped in-bound MIDI data is: nTime.LowByte, nTime.MidByte, nTime.HighByte, bMidiData Refer to command 34h on the characteristics of MIDI UART mode and on how to...

  • Page 99

    6-14 DSP Commands MIDI output Output Remarks Output MIDI data to the MIDI port in non-UART mode. The proper sequence is: Send command 38h. Send MIDI data. See Also command 30h, Polling mode MIDI input Available 1.xx 2.00 2.01+ 3.xx 4.xx Set digitized sound transfer Time Constant Output...

  • Page 100

    DSP Commands 6-15 Set digitized sound output sampling rate Output 41h, wSamplingRate.HighByte, wSamplingRate.LowByte Remarks Valid sampling rates range from 5000 to 45 000 Hz inclusive. Unlike the Time Constant, there is no need to pre-multiply the sampling rate by two before programming the sampling rate for stereo digitized sound I/O.

  • Page 101

    Creative 8-bit to 4-bit ADPCM single-cycle DMA mode digitized sound output Output 74h, wLength.LowByte, wLength.HighByte Remarks Refer to command 16h. See Also command 75h, Creative 8-bit to 4-bit ADPCM single-cycle DMA mode digitized sound output with reference byte Available 1.xx 2.00 2.01+ 3.xx...

  • Page 102

    Creative 8-bit to 4-bit ADPCM single-cycle DMA mode digitized sound output with reference byte Output 75h, wLength.LowByte, wLength.HighByte Remarks Refer to command 17h. See Also command 74h, Creative 8-bit to 4-bit ADPCM single-cycle DMA mode digitized sound output Available 1.xx 2.00 2.01+ 3.xx 4.xx...

  • Page 103

    Creative 8-bit to 3-bit ADPCM single-cycle DMA mode digitized sound output with reference byte Output 77h, wLength.LowByte, wLength.HighByte Remarks Refer to command 17h. See Also command 76h, Creative 8-bit to 3-bit ADPCM single-cycle DMA mode digitized sound output Available 1.xx 2.00 2.01+ 3.xx 4.xx...

  • Page 104

    Output Remarks Refer to command 1Fh. See Also command 76h, Creative 8-bit to 3-bit ADPCM single-cycle DMA mode digitized sound output command DAh, Exit 8-bit auto-init DMA mode digitized sound I/O Available 1.xx 2.00 2.01+...

  • Page 105

    6-20 DSP Commands 8-bit high-speed auto-init DMA mode digitized sound output Output Remarks The DSP will generate an interrupt to signal the application after transferring every Block Size of data set by command 48h. In high-speed mode, the DSP will not accept any other commands. To terminate high-speed mode, send a DSP reset command.

  • Page 106

    DSP Commands 6-21 8-bit high-speed auto-init DMA mode digitized sound input Output Remarks Refer to command 90h. See Also command 90h, 8-bit high-speed auto-init DMA mode digitized sound output command 99h, 8-bit high-speed single-cycle DMA mode digitized sound input Available 1.xx 2.00 2.01+...

  • Page 107

    6-22 DSP Commands Set input mode to mono Output Remarks The default input mode is mono. See Also command A8h, Set input mode to stereo Available 1.xx 2.00 2.01+ 3.xx 4.xx Set input mode to stereo Output Remarks This command must be sent if stereo recording is desired. After recording, command A0h must be sent to set the input mode back to mono.

  • Page 108

    DSP Commands 6-23 B x h Program 16-bit DMA mode digitized sound I/O Output bCommand, bMode, wLength.LowByte, wLength.HighByte Remarks The bCommand byte is organized as: Auto-Init FIFO 0 = D/A 0 = SC 0 = off 1 = A/D 1 = AI 1 = on where D/A stands for digital-to-analog,...

  • Page 109

    6-24 DSP Commands C x h Program 8-bit DMA mode digitized sound I/O Output bCommand, bMode, wLength.LowByte, wLength.HighByte Remarks Except for the high nibble being changed to 1100 binary, the bCommand byte is organized identically as in command Bxh. The bMode byte is organized exactly as in command Bxh. For minimum signal amplitude, the signed 8-bit value is 00h;...

  • Page 110

    DSP Commands 6-25 Turn on speaker Output Remarks The speaker here refers to the connection of the digitized sound output to the amplifier input. It has no effect on the FM music. The DSP takes a maximum of 112 milliseconds to complete this command. Some important notes: On version 1.xx, the DSP will pause the DMA transfer after executing this command.

  • Page 111

    6-26 DSP Commands Turn off speaker Output Remarks The DSP takes a maximum of 220 milliseconds to complete this command. Some important notes: On version 1.xx, the DSP will pause the DMA transfer after executing this command. On DSP version 4.xx, this command has no practical effect on the output signal. However, it will still set to ‘Off’...

  • Page 112

    DSP Commands 6-27 Pause 16-bit DMA mode digitized sound I/O Output Remarks This acts on I/O initiated by command Bxh. Applicable to both single-cycle and auto-init DMA modes. See Also command Bxh, Program 16-bit DMA mode digitized sound I/O command D6h, Continue 16-bit DMA mode digitized sound I/O Available 1.xx 2.00...

  • Page 113

    6-28 DSP Commands Get speaker status Output Remarks Returns the digitized sound output speaker status. After sending this command, read back a byte from the DSP. FFh indicates the speaker is on, 00h that it's off. See Also command D1h, Turn on speaker command D3h, Turn off speaker Available 1.xx...

  • Page 114

    DSP Commands 6-29 Exit 8-bit auto-init DMA mode digitized sound I/O Output Remarks Exits at the end of the current 8-bit auto-init DMA block transfer, and terminates the I/O process. See Also command Cxh, Program 8-bit DMA mode digitized sound I/O commands that initiate 8-bit auto-init DMA mode digitized sound I/O Available 1.xx...

  • Page 115

    Appendix A Sound Blaster I/O Address Maps This appendix lists the I/O addresses used by Sound Blaster cards. The base I/O addresses are selectable to avoid conflicts with other add-on cards. The factory default base I/O address setting for all Sound Blaster cards is 220 Hex. In the following discussion, x is used to denote the selected base I/O address.

  • Page 116: Sb1.5 I/o Address Map, Table A-1 Sb1.5 I/o Ports, Table A-2 Sb1.5 I/o Port Functions

    Sound Blaster I/O Address Maps SB1.5 I/O Address Map Sound Blaster version 1.5 or earlier uses I/O addresses 2x0h - 2xFh, where x is number from 1 to 6. Base Address I/O Addresses Used 210h 210h to 21Fh 220h 220h to 22Fh 230h 230h to 23Fh 240h...

  • Page 117: Sbmcv I/o Address Map, Table A-3 Sbmcv I/o Ports, Table A-4 Sbmcv I/o Port Functions

    Sound Blaster I/O Address Maps SBMCV I/O Address Map Sound Blaster for Micro Channel Version uses I/O addresses 2x0h - 2xFh, where x is a number from 1 to 6. Base Address I/O Addresses Used 210h 210h to 21Fh 220h 220h to 22Fh 230h 230h to 23Fh...

  • Page 118: Sb2.0 I/o Address Map, Table A-5 Sb2.0 I/o Ports

    Sound Blaster I/O Address Maps SB2.0 I/O Address Map Sound Blaster 2.0 uses base I/O address 220h or 240h. These are jumper selectable. Base Address Addresses Used 220h 220h to 22Fh 240h 240h to 24Fh Table A-5: SB2.0 I/O Ports The following table lists the functions of the I/O ports: I/O Address Description...

  • Page 119: Sb2cd I/o Address Map

    Sound Blaster I/O Address Maps SB2CD I/O Address Map Sound Blaster 2.0 CD Interface uses base I/O address 250h or 260h. These are jumper selectable. Base Address I/O Addresses Used 250h 250h to 255h 260h 260h to 265h Table A-7: SB2CD I/O Ports The following table lists the functions of the I/O ports: I/O Address Description...

  • Page 120: Sbpro I/o Address Map

    Sound Blaster I/O Address Maps SBPRO I/O Address Map Sound Blaster Pro uses base I/O address 220h or 240h. These are jumper selectable. Base Address I/O Addresses Used 220h 220h to 233h 240h 240h to 253h Table A-9: SBPRO I/O Ports There are two versions of Sound Blaster Pro.

  • Page 121

    Sound Blaster I/O Address Maps The following table lists the functions of the I/O ports on the Sound Blaster Pro that uses the OPL3 chip: I/O Address Description Access Base + 0h FM Music Status Port Read Base + 0h FM Music Register Address Port Write Base + 1h...

  • Page 122: Sbpro Mcv I/o Address Map

    Sound Blaster I/O Address Maps SBPRO MCV I/O Address Map Sound Blaster Pro for Micro Channel Version uses base I/O address 220h or 240h. These are jumper selectable. Base Address I/O Addresses Used 220h 220h to 233h 240h 240h to 253h Table A-12: SBPRO MCV I/O Ports The following table lists the functions of the I/O ports: I/O Address...

  • Page 123: Sb16 I/o Address Map

    Sound Blaster I/O Address Maps SB16 I/O Address Map Sound Blaster 16 uses base I/O address 220h, 240h, 260h or 280h. These are jumper selectable. Base Address I/O Addresses Used 220h 220h to 233h 240h 240h to 253h 260h 260h to 273h 280h 280h to 293h Table A-14: SB16 I/O Ports...

  • Page 124

    A-10 Sound Blaster I/O Address Maps Sound Blaster 16 also uses the following I/O address es for MPU-401 UART mode support. The base I/O address is jumper selectable for either 300h or 330h. The factory default is 330h. Base Address I/O Addresses Used 300h 300h to 301h...

  • Page 125

    .VOC file. use digitized sound data with multiple sampling rates within a file. The Creative ADPCM wave type is used in the Multimedia Wave File to support the Creative ADPCM compression technique.

  • Page 126: Creative Voice File (voc) Format, Header Block

    File Format Creative Voice File (VOC) Format The Creative Voice File is organized in two main blocks, the Header Block and Data Block. The Header Block contains identifier, version number and pointer to the start of the Data Block. The Data Block is divided into sub-blocks of various types.

  • Page 127: Data Block

    File Format Offset (Hex) Description 18H - 19H .VOC file identification code. This code allows your program to check that this file is a .VOC file. Its content is the complement of the file format version number, plus 1234 hex. For version of 1.20, it is complement(0114H) + 1234H = 111FH.

  • Page 128

    This is an 1 byte field which indicates the packing method used by the digitized sound data of this block. It is defined as: Value Meaning 8-bit PCM Creative 8-bit to 4-bit ADPCM Creative 8-bit to 3-bit ADPCM Creative 8-bit to 2-bit ADPCM...

  • Page 129

    File Format Some points to note for Block Type 1: If this block is preceded by Block Type 8 (discussed later), the digitized sound attributes on Block Type 8 should be used. The digitized sound attributes in this block should be ignored. If this block is alone, the digitized sound channels should be defaulted to mono.

  • Page 130

    File Format Here is a discussion of various fields: bBlockID The Block Type identifier is 3. nBlockLen Length of the block (in bytes), excluding the bBlockID and nBlockLen fields. The value is 3. wPausePeriod This is a 2-byte field which specifies the pause period in units of sampling cycles.

  • Page 131

    File Format During digitized sound output, the CT-VOICE and CTVDSK drivers update the digitized sound status word with this value when the marker is encountered. You program can check for the desired marker value to perform synchronization with the digitized sound output process. Block Type 5 This block enables you to embed a null-terminated ASCII string in the .VOC file.

  • Page 132

    File Format Here is a discussion of various fields: bBlockID The Block Type identifier is 6. nBlockLen Length of the block (in bytes), excluding the bBlockID and nBlockLen fields. The value is 2. wRepeatTimes This is a 2-byte field which specifies the number of times to repeat. It can be any value between 1 to 0FFFE hex inclusive.

  • Page 133

    File Format Block Type 8 This is a special block that carries only the digitized sound attributes. It MUST precede Block Type 1. Usually, this block precedes the stereo or high speed digitized sound data. The Block Header is organized as follows: BYTE bBlockID;...

  • Page 134

    B-10 File Format For a 22 050Hz sampling rate stereo digitized sound, the Time Constant is calculated as follows: Time Constant = 65536 - (256 000 000 / (2 * 22 050)) = 59732 (0E95H) bPackMethod This is a 1-byte field which indicates the packing method used by the digitized sound data of this block.

  • Page 135

    This is 1 for mono or 2 for stereo. wFormat The currently supported formats are: Value Meaning 0x0000 8-bit unsigned PCM 0x0001 Creative 8-bit to 4-bit ADPCM 0x0002 Creative 8-bit to 3-bit ADPCM 0x0003 Creative 8-bit to 2-bit ADPCM 0x0004 16-bit signed PCM 0x0006...

  • Page 136: Creative Adpcm Wave Type Format

    B-12 File Format Creative ADPCM Wave Type Format WAVE_FORMAT_CREATIVE_ADPCM, the name for a new .WAV format tag, 0x0200 has been registered with Microsoft. The wave format header is typedef’ed with typedef struct creative_adpcmwaveformat_tag WAVEFORMATEX ewf; WORD wRevision; } CREATIVEADPCMWAVEFORMAT; An exploded view of the structure is laid out below:...

  • Page 137

    Appendix C Relevant Information If you need more information on the digital audio, MIDI, joystick, Programmable Interrupt Controller (PIC) or Direct Memory Access (DMA) Controller, you may refer to the following sources: Digital Audio For more information on digital audio, see the following books: Principles of Digital Audio Ken C.

  • Page 138

    Relevant Information MIDI For more information on MIDI, see the following book: MIDI: A Comprehensive introduction Joseph Rothstein A-R Editions, Inc PIC and DMA Controllers Programming For more information on the PIC and DMA controllers programming, see the following books: Intel Microsystem Components Handbook Peripherals Volume II 8259 Programmable Interrupt Controller Data Sheet...

  • Page 139

    Index features, 4-6 Register functions, 4-7 A______________________________ register map , 4-7 ADPCM mode CT1745 auto-initialize features, 4-10 8-bit to 2-bit, 3-15 input mixing paths , 4-14 8-bit to 3-bit, 3-15 output mixing paths , 4-13 8-bit to 4-bit, 3-15 register functions, 4-11 definition, 3-7 register map , 4-12 DSP versions supported, 3-8...

  • Page 140

    Index SB-MIDI UART mode, 5-3 sending MIDI data, 5-10 F______________________________ O______________________________ FIFO, 1-4, 6-23 Output mixing paths FM Synthesizers schematic, 4-13 OPL2, 1-3 OPL3, 1-3 P______________________________ Pulse Code Modulation, 3-2 H______________________________ High-speed mode R______________________________ auto-initialize, 3-6 Reading MIDI data, 5-4, 5-10 definition, 3-6 Reference byte, 3-7, 3-13, 3-14 DSP versions supported, 3-8...

  • Page 141

    Index3...

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    Creative LTD. SB0350 Audigy ZS

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    : Audigy_SupportPack_5.exe

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    : wdma_emu.inf

    : Audigy_SupportPack_5.exe

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    : wdma_emu.inf

    : Audigy_SupportPack_5.exe

    : 08/11/2006

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    Creative SB0350 Manuals

    Creative SB0350 Hardware Manual (141 pages)

    Hardware Programming Guide  

    Table of contents Limitation Of Liability3................................................................................................................................................................ Table Of Contents4................................................................................................................................................................ Hardware Overview14................................................................................................................................................................ Digital Sound Processor Chip15................................................................................................................................................................ Mixer Chip16................................................................................................................................................................ Fm Synthesizer Chip16................................................................................................................................................................ Bus Interface Chip17................................................................................................................................................................ Advanced Signal Processor17................................................................................................................................................................ Dsp I/o Addresses24................................................................................................................................................................ Resetting Dsp24................................................................................................................................................................ Table 2-1 Dsp I/o Ports24................................................................................................................................................................ Reading From Dsp25................................................................................................................................................................ Writing To Dsp26................................................................................................................................................................ Handling Interrupts From Dsp26................................................................................................................................................................ Sharing Of Interrupts27................................................................................................................................................................ Configuring Dma And Interrupt Settings28................................................................................................................................................................ Digitized Sound Operation Modes30................................................................................................................................................................ Digitized Sound Data Format31................................................................................................................................................................ Digitized Sound I/o Transfer Rate31................................................................................................................................................................ Single-cycle Dma Mode34................................................................................................................................................................ Auto-initialize Dma Mode35................................................................................................................................................................ High-speed Dma Mode35................................................................................................................................................................ Adpcm Dma Mode36................................................................................................................................................................ Dsp Digitized Sound I/o Capability37................................................................................................................................................................ Table 3-1 Dma Operation Modes Supported37................................................................................................................................................................ Sample Procedures40................................................................................................................................................................ Bit Mono Single-cycle Transfer42................................................................................................................................................................ Bit Mono Auto-initialize Transfer44................................................................................................................................................................ Bit Or 16-bit Single-cycle Transfer55................................................................................................................................................................ Bit Or 16-bit Auto-initialize Transfer57................................................................................................................................................................ Programming Sequence60................................................................................................................................................................ Ct1335 Mixer62................................................................................................................................................................ Features62................................................................................................................................................................ Register Functions62................................................................................................................................................................ Figure 4-1 Register Map Of Ct1335 Mixer62................................................................................................................................................................ Ct1345 Mixer64................................................................................................................................................................ Figure 4-2 Register Map Of Ct1345 Mixer65................................................................................................................................................................ Ct1745 Mixer68................................................................................................................................................................ Sb-midi Mode77................................................................................................................................................................ I/o Addresses77................................................................................................................................................................ Sending Midi Data78................................................................................................................................................................ Reading Midi Data79................................................................................................................................................................ Mpu-401 Uart Mode80................................................................................................................................................................ Checking The Status81................................................................................................................................................................ Sending A Command82................................................................................................................................................................ Commands By Category87................................................................................................................................................................ Command Descriptions90................................................................................................................................................................ Sb1.5 I/o Address Map116................................................................................................................................................................ Table A-1 Sb1.5 I/o Ports116................................................................................................................................................................ Table A-2 Sb1.5 I/o Port Functions116................................................................................................................................................................ Sbmcv I/o Address Map117................................................................................................................................................................ Table A-3 Sbmcv I/o Ports117................................................................................................................................................................ Table A-4 Sbmcv I/o Port Functions117................................................................................................................................................................ Sb2.0 I/o Address Map118................................................................................................................................................................ Table A-5 Sb2.0 I/o Ports118................................................................................................................................................................ Sb2cd I/o Address Map119................................................................................................................................................................ Sbpro I/o Address Map120................................................................................................................................................................ Sbpro Mcv I/o Address Map122................................................................................................................................................................ Sb16 I/o Address Map123................................................................................................................................................................ Creative Voice File (voc) Format126................................................................................................................................................................ Header Block126................................................................................................................................................................ Data Block127................................................................................................................................................................ Creative Adpcm Wave Type Format136................................................................................................................................................................

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